经典的verilog语言学习课件,介绍了语言的基础知识,和实际中该语言的应用包括DSP 设计中的各个方面.-classic Verilog language-learning courseware, introduced a basic knowledge of language, and the reality of the language of applications including DSP design in all its aspects.
文 件 列 表
verilogppt2 组合电路设计描述的优化问题.ppt FIFO设计.ppt FSM设计描述.ppt 模拟及数模混合集成电路设计分析.doc 组合逻辑电路描述.ppt 时序电路设计描述.ppt How To Design A HDL Module?.ppt Combined add and subtractor.ppt TestBench.ppt Verilog_coding_style_0902.ppt 连续输入数据处理.ppt 第二个题目.ppt VSLIDES.PPT switch_level.ppt Testbenches.ppt verilog_coding_style.ppt
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.002570s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.114898s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.004351s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001206s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.000924s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003304s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.000918s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.004018s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.017343s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001364s ]
UPDATE `jrk_articles` SET `hits` = 2 WHERE `id` = 102554 [ RunTime:0.013586s ]