这是一段控制1394芯片的cpld的verilog程序,可以参考,在实际项目中已经采用.-This is a control chip cpld 1394 Verilog the procedures, they can refer to the actual project has been adopted.
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001806s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.135730s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001749s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001231s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001098s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003380s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001038s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003975s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.016647s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001267s ]
UPDATE `jrk_articles` SET `hits` = 2 WHERE `id` = 124582 [ RunTime:0.013303s ]
