Altera DE2板专用CCD驱动器

altera DE2 实验板专用 CCD驱动-altera DE2 board dedicated CCD driver

DE2_CCD_CV
software
dc2_nios_generation_script
dc2_nios_sim
user_logic_SRAM_16Bits_512K
my_de1_board
talkback
Sdram_Control_4Port
db
transcript
CCD_Capture.v
DE2_CCD.asm.rpt
DE2_CCD.cdf
DE2_CCD.done
DE2_CCD.dpf
DE2_CCD.fit.eqn
DE2_CCD.fit.rpt
DE2_CCD.fit.smsg
DE2_CCD.fit.summary
DE2_CCD.flow.rpt
DE2_CCD.map.eqn
DE2_CCD.map.rpt
DE2_CCD.map.summary
DE2_CCD.pin
DE2_CCD.pof
DE2_CCD.qpf
DE2_CCD.qsf
DE2_CCD.qws
DE2_CCD.tan.rpt
DE2_CCD.tan.summary
DE2_CCD_assignment_defaults.qdf
I2C_CCD_Config.v
I2C_Controller.v
Line_Buffer.v
Mirror_Col.v
RAW2RGB.v
SEG7_LUT.v
SEG7_LUT_8.v
Stack_RAM.v
VGA_Param.h
my_pll_waveforms.html
my_pll_wave0.jpg
my_pll.vhd
my_pll.cmp
Reset_Delay.v
sopc_builder_debug_log.txt
.sopc_builder
install.ptf
.sopc_builder
dc2_nios.vhd
dc2_nios.v
dc2_nios.ptf.bak
VGA_Controller.v
altpllpll_0.vhd
dc2_nios_log.txt
ic_tag_ram.mif
rf_ram_a.mif
rf_ram_b.mif
cpu_0_test_bench.vhd
cpu_0_mult_cell.vhd
cpu_0_jtag_debug_module.vhd
cpu_0_jtag_debug_module_wrapper.vhd
altera_vhdl_support.vhd
cpu_0.vhd
cpu_0.ocp
epcs_controller.vhd
sdram_0.vhd
pll_0.vhd
SRAM_16Bit_512K.v
SRAM.vhd
clock_0.vhd
sdram_0_test_component.vhd
dc2_nios.bsf
dc2_nios_setup_quartus.tcl
dc2_translate.bdf
DE2_CCD.bsf
DE2_CCD.sof
cpu_0_ociram_default_contents.mif
epcs_controller_boot_rom.hex
dc2_nios.ptf
pio_0.vhd
DE2_CCD.v
dc2_translate.bsf