1路视频光端机的发射端，VHDL源码，使用全FPGA芯片的硬件，内建成帧、时钟、SERDES-The launch of a video PDH client, VHDL source code, use the whole FPGA chip hardware, built-in framing, clock, SERDES
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.002184s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.107951s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001489s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001960s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001574s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.004994s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001157s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.005400s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.020047s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001366s ]
UPDATE `jrk_articles` SET `hits` = 2 WHERE `id` = 143870 [ RunTime:0.012900s ]
