fpga里实现 uart 经典 vhdl语言写的 ise工程文件
资 源 简 介
fpga里实现 uart 经典 vhdl语言写的 ise工程文件-fpga implementation in vhdl language classic uart of ise project file
文 件 列 表
UART
__projnav
automake.log
baudrate_generator.jhd
baudrate_generator.vhd
baudrate_generator_TB.jhd
baudrate_generator_TB.vhd
counter.jhd
counter.vhd
counter_TB.jhd
counter_TB.vhd
detector.jhd
detector.vhd
detector_TB.jhd
detector_TB.vhd
parity_verifier.jhd
parity_verifier.vhd
parity_verifier_TB.jhd
parity_verifier_TB.vhd
shift_register.jhd
shift_register.vhd
shift_register_TB.jhd
shift_register_TB.vhd
switch.jhd
switch.vhd
switch_bus.jhd
switch_bus.vhd
switch_bus_TB.jhd
switch_bus_TB.vhd
UART.npl
uart_core.jhd
uart_core.vhd
UART_PACKAGE.vhd
uart_top.jhd
uart_top.vhd
uart_top_tb.jhd
uart_top_tb.vhd
__projnav.log
使用说明.txt
