full adder设计代码，verilog 语言描述，通过modelsim 仿真，quartus综合-full adder design code, verilog language to describe, through the ModelSim simulation, quartus integrated
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001330s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.074018s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.000984s ]
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SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001167s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003243s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.000941s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003665s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.015103s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001176s ]
UPDATE `jrk_articles` SET `hits` = 2 WHERE `id` = 191669 [ RunTime:0.023027s ]
