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总线监控环境。

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  • 上传时间:2021-06-30
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资 源 简 介

Welcome to the bus-spy project page
Unfortunatelly, at the moment the project is not open for additional developers (this should hopefully change in near future!).
The goal of this work is to create an environment for monitoring and controlling digital buses not directly connected to the developer"s workstation. It shall help to develop the devices which use such buses. Besides monitoring and evaluating the bus, the environment shall allow also automatically use the bus and so create a virtual device which could be used by a real one to natively communicate with. The environment is expected to consist of both software and hardware modules, the latter one being used to connect to the monitored bus. The design and implementation will be open and modular so that new modules for other buses could be added. Also, it is required to use mechanisms which allow transferring this environment to new platforms. The tar

文 件 列 表

VYPALIT
MASTER_THESIS_Gabriel_Zabusek.pdf
Manuals
User's Manual of CP_JR_ARM7_LPC2368.pdf
SRC
Doxyfile
Documentation
html
moc__i2c__analysis__settings_8cpp__incl.png
BIN
Linux
bus-spy-pc
README.txt

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