等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
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VHDL
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资 源 简 介
等精度频率计的verilogHDL的实现,我花了好长时间才写的哦
文 件 列 表
frequent
count10.v
latch_32.v
fre_ctr.v
count10.acf
fre_ctr.acf
latch_32.acf
latch_32.cnf
LIB.DLS
frequent1.acf
frequent1.v
count10.mmf
count10.scf
latch_32.mmf
U4196924.DLS
fre_ctr.cnf
count10.cnf
fre_ctr.mmf
count10(1).cnf
count10(2).cnf
count10(3).cnf
count10(4).cnf
count10.hif
U9532859.DLS
U5609121.DLS
latch_32.hif
latch_32.ndb
U9441233.DLS
fre_ctr.hif
latch_32.fit
count10.pin
latch_32.pin
count10.fit
count10.ndb
count10.snf
count10.sof
count10.pof
count10.hex
count10.ttf
fre_ctr.ndb
latch_32.snf
latch_32.sof
latch_32.pof
latch_32.hex
latch_32.ttf
latch_32.scf
frequent1.mmf
fre_ctr.fit
fre_ctr.pin
fre_ctr.rpt
fre_ctr.snf
count10.rpt
fre_ctr.sof
fre_ctr.pof
fre_ctr.hex
fre_ctr.ttf
latch_32.rpt
frequent1.rpt
frequent1.cnf
frequent1(1).cnf
U2820636.DLS
frequent1(2).cnf
frequent1(3).cnf
frequent1(4).cnf
frequent1(5).cnf
frequent1(6).cnf
frequent1(7).cnf
frequent1(8).cnf
frequent1.hif
frequent1.pin
frequent1.fit
frequent1.ndb
frequent1.snf
frequent1.sof
frequent1.pof
frequent1.hex
frequent1.ttf
