基于VHDL数字频率计

基于vhdl可用的数字频率计，误差较小，精准度较高。文件中还包含了与arm的通信模块、

FMT
simulation
output_files
incremental_db
greybox_tmp
db
BPS_Ctrl.v
BPS_Ctrl.vhd.bak
CB10.vhd
CB10.vhd.bak
COUNT.vhd
COUNT.vhd.bak
CTRL.vhd
CTRL.vhd.bak
FDIV.vhd
FDIV.vhd.bak
FDIV2.vhd
FDIV2.vhd.bak
F_M.ipinfo
f_m.qpf
f_m.qsf
f_m.qws
f_m.vhd
f_m.vhd.bak
f_m_nativelink_simulation.rpt
LOCK.vhd
LOCK.vhd.bak
output_file.jic
output_file.map
output_file2.jic
output_file2.map
PLL.cmp
PLL.ppf
PLL.qip
PLL.vhd
PLLJ_PLLSPE_INFO.txt
RST_Ctrl.v
RST_Ctrl.vhd.bak
TXD_Ctrl.v
txd_ctrl.v.bak
TXD_Ctrl.vhd.bak
UNION.vhd
USART_Top.v
usart_top.v.bak
USART_Top.vhd.bak