FPGA开发板上写的Verilog代码：
功能是从电脑端发送一个字节，然后把它接收回来。
-FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001372s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.086549s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001311s ]
SELECT * FROM `jrk_tagrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 20 [ RunTime:0.001881s ]
SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001247s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.003670s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001085s ]
SELECT * FROM `jrk_searchrecords` WHERE `status` = 1 ORDER BY `num` DESC LIMIT 5 [ RunTime:0.003232s ]
SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014509s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001302s ]
UPDATE `jrk_articles` SET `hits` = 1 WHERE `id` = 198344 [ RunTime:0.001466s ]
