FPGA development board to write the Verilog code: function is from the client co...
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标 签:
VHDL
vhdl
资 源 简 介
FPGA开发板上写的Verilog代码:
功能是从电脑端发送一个字节,然后把它接收回来。
-FPGA development board to write the Verilog code: function is from the client computer sends a byte, and then receive it back.
文 件 列 表
第六章
BCDadder4
RAM16x8d
RAM16x8sng
adder8_for
bin2gra
cnt99
comp4_if
count_0s
counter_sim
demul1_4_if
encod8_3_casez
first_0
gra2bin
latch4_if
mul3_1_casez
mul4_1_case
mul4_1_if
mul4_2_1
reg4_bpa
reg4_nbp
repeat_1s
sevenseg_case
shl4_for