VHDL language is designed to be simple to use the CPU, the focus of the design o...

用VHDL语言设计简单的CPU，重点设计微操作代码，然后设计CPU各组成模块，最后根据设计的微操作设计微指令，验证设计的正确性。可基本实现加、减、乘、除、移位、循环等操作。-VHDL language is designed to be simple to use the CPU, the focus of the design of micro-operation code, and then design the components of CPU module designed the final design of the micro-operation microinstruction to verify the correctness of the design. Can achieve the basic add, subtract, multiply, divide, transfer, recycling and other operations.

cpu
db
cpu.qpf
cpu.qsf
cpu.map.summary
cpu.done
br.vhd
br.bsf
alu.bsf
mbr.vhd
mbr.bsf
ir.vhd
pc.vhd
mar.vhd
control_unit.vhd
control_unit.bsf
cpu.bdf
ir.bsf
pc.bsf
mar.bsf
memory.mif
lpm_ram_dq0_waveforms.html
lpm_ram_dq0_wave0.jpg
lpm_ram_dq0_wave1.jpg
lpm_ram_dq0.vhd
lpm_ram_dq0.cmp
lpm_ram_dq0.bsf
rom.mif
lpm_rom0_waveforms.html
lpm_rom0_wave0.jpg
lpm_rom0.vhd
lpm_rom0.cmp
lpm_rom0.bsf
alu.vhd
cpu.pin
cpu.fit.smsg
cpu.fit.summary
cpu.tan.summary
cpu.vwf
cpu.map.rpt
cpu.fit.rpt
cpu.asm.rpt
cpu.tan.rpt
cpu.flow.rpt
cpu.sim.rpt
cpu.qws