资 源 简 介
The goal of this project is to build a simple software defined radio using an Altera DE2 board. The receiver will support both AM and FM broadcast bands, and encode the demodulated audio to a compressed format for streaming over ethernet to a target PC.
文 件 列 表
ece5760-sdr-export
core
ethernet
matlab
samples
sw
core
am_demod.v
am_demod.v.bak
AUDIO_FIFO.v
cpu.ocp
cpu.sdc
cpu.v
cpu_bht_ram.mif
cpu_dc_tag_ram.mif
cpu_fpoint.v
cpu_ic_tag_ram.mif
cpu_jtag_debug_module_sysclk.v
cpu_jtag_debug_module_tck.v
cpu_jtag_debug_module_wrapper.v
cpu_mult_cell.v
cpu_ociram_default_contents.mif
cpu_rf_ram_a.mif
cpu_rf_ram_b.mif
cpu_test_bench.v
dds.v
DE2_TOP.qsf
DE2_TOP.v
DE2_TOP.v.bak
divide_clk.v
enet_sender.v
enet_sender_udp.v
fm_demod.v
fm_demod.v.bak
genericavalonmm.v
genericavalonmm_hw.tcl
generic-avalon-mm_hw.tcl
genericavalonmm_hw.tcl~
generic-avalon-mm_hw.tcl~
genericavalonmm_inst.v
iir2.v
iir2.v.bak
jtag_uart.v
lcd.v
pll_if.bsf
pll_if.ppf
pll_if.qip
pll_if.v
pll_if_bb.v
pll_if_inst.v
pll_if_wave0.jpg
pll_if_waveforms.html
rx_data_fifo.v
sdr.qpf
sdr_core.h
SDR_CTRL.v
SDR_DATA.v
SDR_STATUS.v
sdram.v
sdrnios.bsf
sdrnios.ptf
sdrnios.ptf.bak
sdrnios.ptf.pre_generation_ptf
sdrnios.qip
sdrnios.sopc
sdrnios.sopcinfo
sdrnios.v
sdrnios_generation_script
sdrnios_log.txt
sdrnios_setup_quartus.tcl
sine_table.v
sopc_builder_log.txt
stp1.stp
stp2.stp
superpll.bsf
superpll.ppf
superpll.qip
superpll.v
superpll_bb.v
superpll_inst.v
superpll_wave0.jpg
superpll_waveforms.html
timer.v
tri_table.v
