this a pack include source code for quartus 2. It is an implementation of t...

this a pack include source code for quartus 2. It is an implementation of the LC2. The LC-2 computer is described in Introduction to Computing Systems from Bits & Gates to C & Beyond by Yale Patt and Sanjay Patel, McGraw Hill, 2001. The LC2 model can be run as a simulation or downloaded to the UP3 in a larger model, TOP_LC2 that adds video output. Push buttons reset and single step the processor and a video output display of registers is generated. This state machine VHDL-based model of the LC-2 includes all source files. Currently compiled for a Cyclone EP1C6Q240 FPGA.

CHAR_ROM.VHD
CLK_DIV.VHD
DEBOUNCE.VHD
DEC_7SEG.VHD
format.mif
lc2.qpf
lc2.qsf
lc2.qws
lc2.vhd
lc2.vwf
onepulse.vhd
program.mif
top_lc2.qpf
top_lc2.qsf
top_lc2.sof
top_lc2.vhd
top_lc2.vwf
UP1PACK.VHD
VGA_SYNC.VHD