FPGA实现usb驱动

应用背景This is the very first officially available release of the core - It is still under active development - Please do not modify the sources ! - Things that are not implemented yet, or are known not to work yet:   - UTMI line/link control interface is not implemented yet. This includes:     - Detection of attach/detach     - Speed negotiation (Full/High Speed)     - USB reset     - USB suspend   - There is no logic in the core to "help" suspending it. I"m not     quite sure yet what to do in this area. (Suggestions welcomed !)   - There is no easy way to configure the core (number of endpoints,     buffer size)   - There has been absolutely no testing done on the core 关键技术This file describes the current status of the checked in HDL code. Please su

usb
README.txt
STATUS.txt
usb
usb_doc.pdf