FPGA based implementation of a SDR
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标 签:
VHDL
others
资 源 简 介
FPGA based implementation of a SDR - codes in Verilog HDL for the processor and control.-FPGA based implementation of a SDR- codes in Verilog HDL for the processor and control.
文 件 列 表
SDR_COP
adder_sdr.v
alu_sdr.v
configdpu_sdr.v
dpu_sdr.v
maincntler_sdr.v
minorcntler_sdr.v
multiplier_sdr.v
mux_sdr.v
tstbnch_configdpu_sdr.v
tstbnch_dpu_sdr.v
tstbnch_maincntler_sdr.v
tstbnch_minorcntler_sdr.v