Verilog prepared using USB download cable program realize USB protocol and JTAG...
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标 签:
VHDL
资 源 简 介
用verilog编写的USB下载线程序 实现USB协议和JTAG接口的数据转换实现状态机-Verilog prepared using USB download cable program realize USB protocol and JTAG interface to achieve data conversion state machine
文 件 列 表
!readme.txt
!readme.txt
cmp_state.ini
JtagCore.V
mycounter.v
shiftout.v
!readme.txt
cmp_state.ini
JtagCore.V
mycounter.v
shiftout.v
MYLOG-JTAG.TXT
cmp_state.ini
serv_req_info.txt
shiftout.v
cmp_state.ini
JtagCore.V
mycounter.v
serv_req_info.txt
shiftout.v