资 源 简 介
MIPS 1 is a very well known uP architecture.
In this project we provide an asynchronous implementation of
the MIPS architecture (partial for now) coded in Haste language.
(see http://www.handshakesolutions.com)
This project is developed as part of the Technion EE 048878 VLSI-Architectures course assignments. (By Prof. Ran Ginosar http://webee.technion.ac.il/~ran/ ).
The code for the project is provided in the SVN repository.
Final Report and Presentation are provided in the downloads.
