在实施的ee619课程项目

Design and Implementation of 8-bit Kogge Stone Adder in 0.35u Technology Node circuit schematic is for Cadence Design Architect IC project and layout is Cadence Virtuoso project

EE619
AND2
layout
AND3
schematic
pc.db
D_FF
FF
FT_KSA
FT_KSA_backup
INV
av_extracted
prop.xx
KSA
functional
master.tag
KSA_1_prior_to_lvs
KSA_2_with_rightpins
KSA_3_before_correcting_bitPG
KSA_layer1
KSA_layer1234
KSA_symbol
KSA_test
KSA_testbench
MUX2_1
MUX2_1_awes
symbol
pc.db
NAND2
NAND2_optimized_notworking
NOR2
OR2
OR2_test
TG
Testbench
XOR2
XOR2_test
bitPG
groupG
groupG_new
groupPG
logic_test_ckt
temp
temp123
KSA_FT
KSA_t1
KSA_FT_testbench
FF_test
DFF_not_working
prop.xx
inca.lnx8664.166.pak
cdsinfo.tag
AND2
prop.xx
layout
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
layout.cd%
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb
pc.db
master.tag
layout.cdb