GHash函数实现高效的FPGA

Cutting edge low area and multi-gigabit GHASH function FPGA implementation to perform NIST compliant cryptographic message authentication Key Features Key-dependent basic and pipelined architectures Suitable for standardized AES mode AES-GCM and standalone GMAC Supports SRAM and FLASH based FPGA technologies Large range of targets from Xilinx low-cost Spartan-3 to high-performance Virtex-6 Achieves up to 400 Gbit/s of throughput on a Virtex-6 FPGA: 请点击左侧文件开始预览 ！预览只提供20%的代码片段，完整代码需下载后查看 加载中 侵权举报