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DE2 练习源码2-1

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  • 标      签: 嵌入式系统 vhdl 源码 de 练习

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Part I We wish to display on the 7-segment displays HEX3 to HEX0 the values set by the switches SW15−0. Let the values denoted by SW15−12, SW11−8, SW7−4 and SW3−0 be displayed on HEX3, HEX2, HEX1 and HEX0, respectively. Your circuit should be able to display the digits from 0 to 9, and should treat the valuations 1010 to 1111 as don’t-cares. 1. Create a new project which will be used to implement the desired circuit on the Altera DE2 board. The intent of this exercise is to manually derive the logic functions needed for the 7-segment displays. You should use only simple VHDL assignment statements in your code and specify e

文 件 列 表

part1
incremental_db
db
lab2part1.asm.rpt
lab2part1.done
lab2part1.fit.rpt
lab2part1.fit.summary
lab2part1.flow.rpt
lab2part1.map.rpt
lab2part1.map.summary
lab2part1.pin
lab2part1.pof
lab2part1.qpf
lab2part1.qsf
lab2part1.qsf.bak
lab2part1.qws
lab2part1.sof
lab2part1.tan.rpt
lab2part1.vhd
lab2part1.vhd.bak

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