Implementing a TMDS Video Interface in the Spartan-6 FPGA
资 源 简 介
This application note describes a set of reference designs able to
transmit and receive DVI and HDMI data streams up to 1080 Mb/s using the
native TMDS I/O interface featured by Spartan-6 FPGAs.
文 件 列 表
xapp495
dvi_demo
readme.txt
