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many verilog source codes, include a lot of small electrocircuit.

  • 资源大小:166.45 kB
  • 上传时间:2021-06-30
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  • 资源积分:1积分
  • 标      签: 嵌入式系统 others

资 源 简 介

很多verilog源代码,包括很多小电路。

文 件 列 表

VERILOG_CODE
TIMING
LS
INTRA_ASSIGNMENT_INTRA_ASSIGNMENT
NETLISTS
ADD_BEH.V
ADD_RTL.V
ADD_SIM.V
AFIFO.ACF
AFIFO.HIF
AFIFO.MMF
AFIFO.V
AFIFO_BEH.V
AFIFO_RTL.ACF
AFIFO_RTL.HIF
AFIFO_RTL.MMF
AFIFO_RTL.V
AFIFO_SIM.V
CHECKSUM.V
CHECK_SIM.V
CNT_BEH.V
CNT_RTL.V
CNT_SIM.V
CRC_BEH.V
CRC_RTL.V
CRC_SIM.V
DRAMCON_BEH.V
DRAMCON_RTL.V
DRAMCON_SIM.V
DUAL.V
DUAL_SIM.V
ENCR-RTL.ACF
ENCR-RTL.HIF
ENCR-RTL.V
ENCRYPTATION.ACF
ENCRYPTATION.CNF
ENCRYPTATION.FIT
ENCRYPTATION.HEX
ENCRYPTATION.HIF
ENCRYPTATION.MMF
ENCRYPTATION.NDB
ENCRYPTATION.PIN
ENCRYPTATION.POF
ENCRYPTATION.RPT
ENCRYPTATION.SNF
ENCRYPTATION.SOF
ENCRYPTATION.TTF
ENCRYPTATION.V
ENCRYPTATION(1).CNF
ENCR_BEH.V
ENCR_RTL.ACF
ENCR_RTL.HIF
ENCR_RTL.MMF
ENCR_RTL.V
ENCR_SIM.V
FPDRAMCON_BEH.V
FPDRAMCON_RTL.V
FULLCASE.V
FULLCASE1.V
FULLCASE2.V
HAMDEC.V
HAMGEN.V
HAM_SIM.V
JK_BEH.V
JK_RTL.V
JK_SIM.V
LFSR2_BEH.V
LFSR2_RTL.V
LFSR_BEH.V
LFSR_RTL.V
LFSR_SIM.V
LIB.DLS
MEALY_BEH.V
MEALY_RTL.V
MONO.V
MONO2.V
MONO_SIM.V
MOORE2_RTL.V
MOORE_BEH.V
MOORE_RTL.V
NORACE.V
ONEHOT_RTL.V
OPT.V
PAR.V
PAR_SIM.V
PLL_BEH.V
PLL_RTL.V
PLL_SIM.V
RAM.V
RAM_SIM.V
SFIFO_BEH.V
SFIFO_RTL.V
SFIFO_SIM.V
SHIFT_BEH.V
SHIFT_RTL.V
SHIFT_SIM.V
SMULTIPLY1_RTL.V
SMULTIPLY2_RTL.V
SMULTIPLY3_RTL.V
SMULTIPLY_BEH.V
SMULTIPLY_SIM.V
SM_ROM.V
SRAMCON_BEH.V
SRAMCON_RTL.V
SRAMCON_SIM.V
SSRAMCON_BEH.V
SSRAMCON_RTL.V
SSRAMCON_SIM.V
STATE_SIM.V
TEMPLATE.V
U1942304.DLS
U2050358.DLS
U8414017.DLS
U8569794.DLS
UMULTIPLY1_RTL.V
UMULTIPLY2_RTL.V
UMULTIPLY3_RTL.V
UMULTIPLY_BEH.V
UMULTIPLY_SIM.V
UM_ROM.V
VERILOG SOURCE CODE1.V
TIMING
HDL

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