FPGA开发板上实现秒表计数器功能

这是我上大三时的电子设计题目，叫秒表的功能实现。利用ISE软件进行编程，代码是VHDL语言的，可以实现时（0-9）分（0-59）秒（0-59）即最大10小时的计数，对于不同开发板，可以适当修改代码，使之成为更加广泛的计数器。代码纯原创，请下载。

miaobiao2
.lso
_impact.cmd
_impact.log
_ngo
_xmsgs
data6to1.prj
data6to1.spl
data6to1.stx
data6to1.sym
data6to1.vhd
data6to1.xst
data6to1_summary.html
data6to1_vhdl.prj
decode7.prj
decode7.spl
decode7.stx
decode7.sym
decode7.vhd
decode7.xst
decode7_summary.html
decode7_vhdl.prj
default.ipf
default.ipf_ISE_Backup
device_usage_statistics.html
en.prj
en.spl
en.stx
en.sym
en.vhd
en.xst
en_summary.html
en_vhdl.prj
fenpin.prj
fenpin.spl
fenpin.stx
fenpin.sym
fenpin.vhd
fenpin.xst
fenpin_summary.html
fenpin_vhdl.prj
jishu10.prj
jishu10.spl
jishu10.stx
jishu10.sym
jishu10.vhd
jishu10.xst
jishu10_summary.html
jishu10_vhdl.prj
jishu6.prj
jishu6.spl
jishu6.stx
jishu6.sym
jishu6.vhd
jishu6.xst
jishu6_summary.html
jishu6_vhdl.prj
jishu6a.prj
jishu6a.spl
jishu6a.stx
jishu6a.sym
jishu6a.vhd
jishu6a.xst
jishu6a_vhdl.prj
jishu6b.vhd
latch.prj
latch.spl
latch.stx
latch.sym
latch.vhd
latch.xst
latch_vhdl.prj
miaobiao2.ipf
miaobiao2.ipf_ISE_Backup
miaobiao2.ise
miaobiao2.ise_ISE_Backup
miaobiao2.ntrc_log
miaobiao2.restore
pepExtractor.prj
stopwatch.bgn
stopwatch.bit
stopwatch.bld
stopwatch.cmd_log
stopwatch.drc
stopwatch.jhd
stopwatch.lso
stopwatch.ncd
stopwatch.ngc
stopwatch.ngd
stopwatch.ngr
stopwatch.pad
stopwatch.par
stopwatch.pcf
stopwatch.prj
stopwatch.sch
stopwatch.schbak
stopwatch.schcmd
stopwatch.stx
stopwatch.sym
stopwatch.syr
stopwatch.twr
stopwatch.twx
stopwatch.ucf
stopwatch.udo
stopwatch.unroutes
stopwatch.ut
stopwatch.vhd
stopwatch.vhf
stopwatch.xpi
stopwatch.xst
stopwatch_fpe.prj
stopwatch_guide.ncd
stopwatch_map.map
stopwatch_map.mrp
stopwatch_map.ncd
stopwatch_map.ngm
stopwatch_pad.csv
stopwatch_pad.txt
stopwatch_prev_built.ngd
stopwatch_stopwatch_sch_tb.fdo
stopwatch_stopwatch_sch_tb.udo
stopwatch_summary.html
stopwatch_summary.xml
stopwatch_usage.xml
stopwatch_vhdl.prj
testdata6to1.vhd
testdata6to1_vhd.udo
testdecode7.vhd
testdecode7_vhd.fdo
testdecode7_vhd.udo
testen.vhd
testen_vhd.udo
testfenpin.vhd
testfenpin_vhd.udo
testjishu10.vhd
testjishu10_vhd.fdo
testjishu10_vhd.udo
testjishu6.vhd
testjishu6_vhd.fdo
testjishu6_vhd.udo
testjishu6a.vhd
testjishu6a_vhd.udo
testlatch.vhd
testlatch_vhd.fdo
testlatch_vhd.udo
teststop.vhd
teststopwatch.vhd
testzhuanhuan.vhd
testzhuanhuan_vhd.fdo
testzhuanhuan_vhd.udo
transcript
vsim.wlf
work
xiaodou.fdo
xiaodou.udo
xiaodou.vhd
xst
zhuanhuan.prj
zhuanhuan.spl
zhuanhuan.stx
zhuanhuan.sym
zhuanhuan.vhd
zhuanhuan.xst
zhuanhuan_vhdl.prj