本文:采用了FPGA方法来模拟高动态(Global Position System GPS)信号源中的C/A码产生器。C/A码在GPS中实现分址、卫星信号粗捕和精码(P码)引导捕获起着重要的作用,通过硬件描述语言VERILOG在ISE中实现电路生成,采用MODELSIM、SYNPLIFY工具分别进行仿真和综合。
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001490s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.117211s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.001537s ]
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SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.001529s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.005495s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.001391s ]
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SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.014897s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001141s ]
UPDATE `jrk_articles` SET `hits` = 2 WHERE `id` = 494648 [ RunTime:0.014752s ]