Turbo Decoder Release 0.3
* Double binary, DVB-RCS code
* Soft Output Viterbi Algorithm
* MyHDL c
资 源 简 介
Turbo Decoder Release 0.3
* Double binary, DVB-RCS code
* Soft Output Viterbi Algorithm
* MyHDL cycle/bit accurate model
* Synthesizable VHDL model
