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您现在的位置是:虫虫源码 > 其他 > XAPP806 -决定DDR反馈时钟的最佳DCM相移

XAPP806 -决定DDR反馈时钟的最佳DCM相移

  • 资源大小:322 K
  • 上传时间:2024-04-08
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  • 标      签: XAPP 806 DDR DCM

资 源 简 介

This application note describes how to build a system that can be used for determining theoptimal phase shift for a Double Data Rate (DDR) memory feedback clock. In this system, theDDR memory is controlled by a controller that attaches to either the OPB or PLB and is used inan embedded microprocessor application. This reference system also uses a DCM that isconfigured so that the phase of its output clock can be changed while the system is running anda GPIO core that controls that phase shift. The GPIO output is controlled by a softwareapplication that can be run on a PowerPC® 405 or Microblaze™ microprocessor.

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