基于FPGA芯片Stratix II EP2S60F672C4设计了一个适用于宽带数字接收机的带宽可变的数字下变频器（VB-DDC）。该VB-DDC结合传统数字下变频结构与多相滤波结构的优点，实现了对输入中频信号的高效高速处理，同时可以在较大范围内对信号处理带宽灵活配置。硬件调试结果验证了本设计的有效性。
SHOW FULL COLUMNS FROM `jrk_downrecords` [ RunTime:0.001077s ]
SELECT `a`.`aid`,`a`.`title`,`a`.`create_time`,`m`.`username` FROM `jrk_downrecords` `a` INNER JOIN `jrk_member` `m` ON `a`.`uid`=`m`.`id` WHERE `a`.`status` = 1 GROUP BY `a`.`aid` ORDER BY `a`.`create_time` DESC LIMIT 10 [ RunTime:0.059598s ]
SHOW FULL COLUMNS FROM `jrk_tagrecords` [ RunTime:0.000983s ]
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SHOW FULL COLUMNS FROM `jrk_member` [ RunTime:0.000975s ]
SELECT `id`,`username`,`userhead`,`usertime` FROM `jrk_member` WHERE `status` = 1 ORDER BY `usertime` DESC LIMIT 10 [ RunTime:0.002914s ]
SHOW FULL COLUMNS FROM `jrk_searchrecords` [ RunTime:0.000774s ]
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SELECT aid,title,count(aid) as c FROM `jrk_downrecords` GROUP BY `aid` ORDER BY `c` DESC LIMIT 10 [ RunTime:0.029409s ]
SHOW FULL COLUMNS FROM `jrk_articles` [ RunTime:0.001700s ]
UPDATE `jrk_articles` SET `hits` = 2 WHERE `id` = 568896 [ RunTime:0.016975s ]
