Gaussian Random number generator (hardware implemented)
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- 上传时间：2021-06-30
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标 签：
Verilog
资 源 简 介
This is hardware implemented Gaussian random number generator based on the article attached in the folder "Document"
The system is based on the Ziggurat Gaussin random algorithm and implemented when I was under-graduate.
Although it is not my original system, it is so helpful cause I can acquire a lot of useful skills of verilog programming such as pipeline.
It is well simulated on the synthesis tool (ISE14.7) and the printed data can be verified using Matlab which is in the "Document" folder.
The testbench fils is tb_Zigg.v, and the top module file is top_Zigg.v
Goodlucks~
文 件 列 表
20160205.PNG
Design.JPG
Documents
matlab
ZIGGURAT-BASED HARDWARE GAUSSIAN RANDOM NUMBER GENERATOR.pdf
ZigguratGaussianRand
abs_mod.v
coefficient_ROM.v
comparator.v
Delay_Trunc.v
fifo.v
fifo_tb.v
fixed2s_add.v
fi_ROM.v
mult_zig.v
OperationUnit_Zig.v
tb_Zigg.v
top_Zigg.v
UniformRNG.v
wi_ki_ROM.v
x_comp.v
