CRC码产生器与校验器程序
Features ：
Executes in one clock cycle per data word
Any po...
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标 签：
加密解密
vhdl
资 源 简 介
CRC码产生器与校验器程序
Features ：
Executes in one clock cycle per data word
Any polynomial from 4 to 32 bits
Any data width from 1 to 256 bits
Any initialization value
Synchronous or asynchronous reset-CRC code generator and calibration program Features: Executes in one clock cycle per data word Any polynomial from 4 to 32 bits Any data width from 1 to 256 bits Any initialization value Synchronous or asynchronous reset
文 件 列 表
ucrc_par.vhd
ucrc_pkg.vhd
ucrc_ser.vhd
