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您现在的位置是:虫虫源码 > 其他 > 简单的32位RISC CPU内核

简单的32位RISC CPU内核

  • 资源大小:8.73 MB
  • 上传时间:2021-06-30
  • 下载次数:0次
  • 浏览次数:1次
  • 资源积分:1积分
  • 标      签: Verilog verilog 简单 内核 RISCCPU

资 源 简 介

我是在韩国仁荷大学学生。这是项目结果的计算机体系结构。它的 CPU 核心,32 位 RISC 系统。它可以在 300 MIPS opreated。1cycle / 1instruction 系统。它提出简单的哈佛架构。和做简单的算术逻辑。

文 件 列 表

TF1
.lso
.prj
.stx
.xst
ALU16.cmd_log
ALU16.lso
ALU16.ngc
ALU16.ngr
ALU16.prj
ALU16.stx
ALU16.syr
ALU16.v
ALU16.xst
ALU16_envsettings.html
ALU16_summary.html
ALU16_xst.xrpt
CLA_16bit.cmd_log
CLA_16bit.lso
CLA_16bit.ngc
CLA_16bit.ngr
CLA_16bit.prj
CLA_16bit.stx
CLA_16bit.syr
cla_16bit.v
CLA_16bit.xst
CLA_16bit_xst.xrpt
cla_4bit.bmm
cla_4bit.v
cla_unit.v
control_fsm.bld
control_fsm.cmd_log
control_fsm.lso
control_fsm.ncd
control_fsm.ngc
control_fsm.ngd
control_fsm.ngr
control_fsm.pad
control_fsm.par
control_fsm.pcf
control_fsm.prj
control_fsm.ptwx
control_fsm.stx
control_fsm.syr
control_fsm.twr
control_fsm.twx
control_fsm.unroutes
control_fsm.v
control_fsm.xpi
control_fsm.xst
control_fsm_envsettings.html
control_fsm_guide.ncd
control_fsm_isim_beh.exe
control_fsm_map.map
control_fsm_map.mrp
control_fsm_map.ncd
control_fsm_map.ngm
control_fsm_map.xrpt
control_fsm_ngdbuild.xrpt
control_fsm_pad.csv
control_fsm_pad.txt
control_fsm_par.xrpt
control_fsm_stx_beh.prj
control_fsm_summary.html
control_fsm_summary.xml
control_fsm_usage.xml
control_fsm_xst.xrpt
demux1to2.cmd_log
demux1to2.lso
demux1to2.ngc
demux1to2.ngr
demux1to2.prj
demux1to2.stx
demux1to2.syr
demux1to2.v
demux1to2.xst
demux1to2_envsettings.html
demux1to2_summary.html
demux1to2_xst.xrpt
demux1to4.prj
demux1to4.stx
demux1to4.v
demux1to4.xst
d_mem.cmd_log
d_mem.lso
d_mem.ngr
d_mem.prj
d_mem.spl
d_mem.stx
d_mem.sym
d_mem.syr
d_mem.v
d_mem.xst
d_mem_summary.html
fmem.v
fmem_isim_beh.exe
fmem_isim_beh.wdb
fmem_stx_beh.prj
full_adder.v
full_adder_isim_beh.exe
full_adder_isim_beh1.wdb
full_adder_stx_beh.prj
fuse.log
f_test.v
f_test2.wcfg
f_test_beh.prj
f_test_isim_beh.exe
f_test_isim_beh.wdb
f_test_stx_beh.prj
g_reg.cmd_log
g_reg.lso
g_reg.ngc
g_reg.ngr
g_reg.prj
g_reg.stx
g_reg.syr
g_reg.v
g_reg.xst
g_reg_envsettings.html
g_reg_summary.html
g_reg_xst.xrpt
ipcore_dir
iseconfig
ALU16.xreport
isim
isim_usage_statistics.html
isim.cmd
isim.log
l_reg.prj
l_reg.stx
l_reg.v
l_reg.xst
mux2to1.prj
mux2to1.stx
mux2to1.v
mux2to1.xst
mux2to1_16.prj
mux2to1_16.stx
mux2to1_16.v
mux2to1_16.xst
mux2to1_4.prj
mux2to1_4.stx
mux2to1_4.v
mux2to1_4.xst
mux2to1_isim_beh.exe
mux2to1_isim_beh.wdb
mux2to1_stx_beh.prj
mux4to1_16.prj
mux4to1_16.stx
mux4to1_16.xst
n_test.wcfg
n_test2.wcfg
pc_adder.prj
pc_adder.stx
pc_adder.v
pc_adder.xst
pc_reg.prj
pc_reg.stx
pc_reg.v
pc_reg.xst
pdemux3.v
pipe_fsm.prj
pipe_fsm.stx
pipe_fsm.v
pipe_fsm.xst
pipe_ir.prj
pipe_ir.stx
pipe_ir.v
pipe_ir.xst
pipe_ir_isim_beh.exe
pipe_ir_isim_beh1.wdb
pipe_ir_stx_beh.prj
p_demux.cmd_log
p_demux.lso
p_demux.ngc
p_demux.ngr
p_demux.prj
p_demux.stx
p_demux.syr
p_demux.v
p_demux.xst
p_demux2.v
p_demux_envsettings.html
p_demux_summary.html
p_demux_xst.xrpt
p_mem.prj
p_mem.stx
P_mem.v
p_mem.xst
p_mem_isim_beh.exe
p_mem_isim_beh1.wdb
p_mem_stx_beh.prj
reg_file.cmd_log
reg_file.lso
reg_file.ngc
reg_file.ngr
reg_file.prj
reg_file.spl
reg_file.stx
reg_file.sym
reg_file.syr
reg_file.v
reg_file.xst
reg_file_envsettings.html
reg_file_stx_beh.prj
reg_file_summary.html
reg_file_xst.xrpt
sign_extend.prj
sign_extend.stx
sign_extend.v
sign_extend.xst
tb_tf0.v
tb_tf0_beh.prj
tb_tf0_isim_beh.exe
tb_tf0_isim_beh.wdb
tb_tf0_stx_beh.prj
test.v
test.wcfg
test2.wcfg
test3.v
test3_beh.prj
test3_isim_beh.exe
test3_isim_beh.wdb
test3_isim_beh1.wdb
test3_isim_beh2.wdb
test3_stx_beh.prj
testbench.v
testbench_stx_beh.prj
testbench_tf0.v
testbench_tf0_beh.prj
testbench_tf0_isim_beh.exe
testbench_tf0_isim_beh.wdb
testbench_tf0_isim_beh1.wdb
testbench_tf0_stx_beh.prj
test_2.v
test_2_isim_beh.exe
test_2_isim_beh1.wdb
test_2_stx_beh.prj
test_am.v
test_am_isim_beh.exe
test_am_stx_beh.prj
test_isim_beh.exe
test_isim_beh.wdb
test_isim_beh1.wdb
test_mem.v
test_mem2.v
test_mem2_beh.prj
test_mem2_isim_beh.exe
test_mem2_isim_beh.wdb
test_mem2_stx_beh.prj
test_mem_beh.prj
test_mem_isim_beh.exe
test_mem_isim_beh.wdb
test_mem_isim_beh1.wdb
test_mem_stx_beh.prj
test_reg.v
test_reg_isim_beh.exe
test_reg_isim_beh1.wdb
test_reg_stx_beh.prj
test_stx_beh.prj
tf0.bmm
tf0.cmd_log
TF0.gise
tf0.lso
tf0.ngc
tf0.ngr
tf0.prj
tf0.stx
tf0.syr
tf0.v
TF0.xise
tf0.xst
tf0_envsettings.html
tf0_isim_beh.exe
tf0_isim_beh1.wdb
tf0_stx_beh.prj
tf0_summary.html
tf0_xst.xrpt
top.cmd_log
top.lso
top.ngc
top.ngr
top.prj
top.stx
top.syr
top.v
top.xst
top_envsettings.html
top_summary.html
top_xst.xrpt
webtalk_pn.xml
xilinxsim.ini
xlnx_auto_0_xdb
cst.xbcd
xst
dump.xst
ALU16.prj
ngx
notopt
_ngo
netlist.lst
_xmsgs
map.xmsgs

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